Features - Options

FrameScan & DeltaScan

Frame Scan & Delta Scan are developed by Teradyne co. in America, and these are mainly used to test the problem happen to PCB manufacturing process such as cold soldering and resistive solder joints of IC etc. Recently, the spread of SMT IC has increased and high densification is proceeding to improve the package from DIP to PGA, BGA and CSP more and more. AT-01 is featured to have high speed, reliability and low-cost corresponding to technological aggress, which FrameScan & DeltaScan are applied.
 

FrameScan

Excels in testing connectors and sockets

Very fast test generation

No device functionality information required

Precise diagnostics to the pin

Tests not often influenced by board topology

DeltaScan

In order to test whether or not IC assembly on PCB is accurate, Delta Scan tests the variation of DC current through Protect diode of each pin. For the OFF state of PCB power source, certain 2 pins on device always indicate the equivalent circuit as shown.

Delta Scan's Features

No fixture hardware required

Predictable fault coverage

No device package constraints

Detects several fault classes, including cold solder joints

Most effective on large digital devices

High repeatability

Fast execution and Accurate diagnostics

Complements other Vectorless techniques

Gray code or vector tests

* Fault class coverage : Open pin, blown bond wires, blown drivers, blown diodes, Misoriented devices, single power/ground pins

Superior Test Coverage

Boundary-Scan Test

Boundary-scan, as defined by the IEEE Std. 1149.1 standard, is an integrated method for testing interconnects on printed circuit boards that is implemented at the IC level. The inability to test highly complex and dense printed circuit boards using traditional in-circuit testers and bed of nail fixtures was already evident in the mid eighties. Due to physical space constraints and loss of physical access to fine pitch components and BGA devices, fixturing cost increased dramatically while fixture reliability decreased at the same time.

Boundary-Scan Test

In the 1980s, the Joint Test Action Group (JTAG) developed a specification for boundary-scan testing that was standardized in 1990 as the IEEE Std. 1149.1-1990. In 1993 a new revision to the IEEE Std. 1149.1 standard was introduced (titled 1149.1a) and it contained many clarifications, corrections, and enhancements. In 1994, a supplement that contains a description of the boundary-scan Description Language (BSDL) was added to the standard.

Applications are found in high volume, high-end consumer products, telecommunication products, defense systems, computers, peripherals, and avionics.

Boundary-Scan Test Advantages

Stuck-at fault, Bridge fault 100% Detection

In-system-programming of PLD

Flash memory programming

To reduce Test preparation time-consuming Simple Test H/W

To reduce Test cost

Easy to find Fault Location

Concurrent Engineering

Easy to debug at the layout level